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| Name | Last modified | Size | Description |
|---|---|---|---|---|
| Parent Directory | - | ||
| 0001_Add_core_files_for_processing_Earlgrey_in_Yosys.patch | 2023-09-14 18:30 | 725 | |
| 0001_Add_opentitan_patch_for_uhdm.patch | 2023-09-14 18:30 | 6.4K | |
| 0001_allow_processing_cores_without_top_module.patch | 2023-09-14 18:30 | 1.1K | |
| 0002_use_Edalize_fork_for_SystemVerilog_in_Yosys.patch | 2023-09-14 18:30 | 881 | |
| Makefile.in | 2023-09-14 18:30 | 2.4K | |
| boot_rom_fpga_nexysvideo.32.vmem | 2023-09-14 18:30 | 42K | |
| build.tcl | 2023-09-14 18:30 | 353 | |
| opentitan_parsing_test/ | 2023-09-14 18:30 | - | |
| opentitan_synth_patches/ | 2023-09-14 18:30 | - | |
| opentitan_synth_vmem_files/ | 2023-09-14 18:30 | - | |